IBM Statement of Non-Assertion
of Named Patents Against OSS
IBM is committed to
promoting innovation for the benefit of our customers and for the overall
growth and advancement of the information technology field. IBM takes many actions
to promote innovation. Today, we are announcing a new innovation initiative. We
are pledging the free use of 500 of our U.S. patents, as well as all
counterparts of these patents issued in other countries, in the development,
distribution, and use of open source software. We believe that the open source
community has been at the forefront of innovation and we are taking this action
to encourage additional innovation for open platforms. The following is the
text of our pledge. It is our intent that this pledge be legally binding and
enforceable by any open source software developer, distributor, or user who
uses one or more of the 500 listed U.S. patents and/or the counterparts of
these patents issued in other countries.
IBM's Legally Binding
Commitment Not To Assert the 500 Named Patents Against OSS
The pledge will benefit
any Open Source Software. Open Source Software is any computer software program
whose source code is published and available for inspection and use by anyone,
and is made available under a license agreement that permits recipients to
copy, modify and distribute the program’s source code without payment of fees
or royalties. All licenses certified by opensource.org and listed on their
website as of 01/11/2005 are Open Source Software licenses for the purpose of
this pledge..
IBM hereby commits not
to assert any of the 500 U.S. patents listed below, as well as all counterparts
of these patents issued in other countries, against the development, use or
distribution of Open Source Software.
In order to foster
innovation and avoid the possibility that a party will take advantage of this
pledge and then assert patents or other intellectual property rights of its own
against Open Source Software, thereby limiting the freedom of IBM or any other
Open Source Software developer to create innovative software programs, the
commitment not to assert any of these 500 U.S. patents and all counterparts of
these patents issued in other countries is irrevocable except that IBM reserves
the right to terminate this patent pledge and commitment only with regard to
any party who files a lawsuit asserting patents or other intellectual property
rights against Open Source Software.
Background information
on 500 pledged patents
Publication Title
US6317811
Method and system for reissuing load requests in a multi-stream prefetch design
US6298435
Methods and apparatus for exploiting virtual buffers to increase instruction
parallelism in a pipelined processor
US6298417
Pipelined cache memory deallocation and storeback
US6286094
Method and system for optimizing the fetching of dispatch groups in a
superscalar processor
US6279105
Pipelined two-cycle branch target address cache
US6266767
Apparatus and method for facilitating out-of-order execution of load
instructions
US6240474
Pipelined read transfers
US6237081
Queuing method and apparatus for facilitating the rejection of sequential
instructions in a processor
US6219743
Apparatus for dynamic resource mapping for isolating interrupt sources and
method therefore
US6202128
Method and system for pre-fetch cache interrogation using snoop port
US6189065
Method and apparatus for interrupt load balancing for powerPC processors
US5659722
Multiple condition code branching system in a multi-processor environment
US5655141
Method and system for storing information in a processing system
US5644779
Processing system and method of operation for concurrent processing of branch
instructions with canceling of processing of a branch instruction
US5619408
Method and system for recoding
noneffective instructions within a data processing system
US5615360
Method for interfacing
applications with a content addressable memory
US5253349
Decreasing processing time for
type 1 dyadic instructions
US5224215
Message queue processing among
cooperative processors having significant speed differences
Publication Title
US6237067
System and method for handling
storage consistency conflict
US6230219
High performance multichannel
DMA controller for a PCI host bridge with a built-in cache
US6219737
Read request performance of a
multiple set buffer pool bus bridge
US5671370
Alternating data valid control
signals for high performance data transfer
US5659696
Method and apparatus for
determining address location and taking one of two actions depending on the
type of read/write data transfer required
US5634007
Independent computer storage
addressing in input/output transfers
US5613163
Method and system for
predefined suspension and resumption control over I/O programs
US5224213
Ping-pong data buffer for
transferring data from one data bus to another data bus
US5195185
Dynamic bus arbitration with
concurrent same bus granting every cycle
Publication Title
US6334172
Cache coherency protocol with
tagged state for modified values
US6311253
Methods for caching cache tags
US6304939
Token mechanism for cache-line
replacement within a cache memory having redundant cache lines
US6275908
Cache coherency protocol
including an HR state
US6272603
Cache coherency protocol
having hovering (H), recent (R), and tagged (T) states
US6272601
Critical word forwarding in a
multiprocessor system
US6263407
Cache coherency protocol
including a hovering (H) state having a precise mode and an imprecise mode
US6240489
Method for implementing a
pseudo least recent used (LRU) mechanism in a four-way cache memory within a
data processing system
US6226725
Method and system in a data
processing system for the dedication of memory storage locations
US6222752
Dynamic word line driver for
cache
US6212616
Even/odd cache directory
mechanism
US6202132
Flexible cache-coherency
mechanism
US6182201
Demand-based issuance of cache
operations to a system bus
US5694573
Shared L2 support for
inclusion property in split L1 data and instruction caches
US5692151
High performance/low cost
access hazard detection in pipelined cache controller using comparators with a
width shorter than and independent of total width of memory address
US5687350
Protocol and system for
performing line-fill address during copy-back operation
US5684976
Method and system for reduced
address tags storage within a directory having a tree-like data structure
US5668972
Method and system for
efficient miss sequence cache line allocation utilizing an allocation control
cell state to enable a selected match line
US5664150
Computer system with a device
for selectively blocking writebacks of data from a writeback cache to memory
US5664147
System and method that
progressively prefetches additional lines to a distributed stream buffer as the
sequentiality of the memory accessing is demonstrated
US5659710
Cache coherency method and
system employing serially encoded snoop responses
US5659699
Method and system for managing
cache memory utilizing multiple hash functions
US5651136
System and method for
increasing cache efficiency through optimized data allocation
US5642491
Method for expanding
addressable memory range in real-mode processing to facilitate loading of large
programs into high memory
US5640534
Method and system for
concurrent access in a data cache array utilizing multiple match line selection
paths
US5640526
Superscaler instruction
pipeline having boundary identification logic for variable length instructions
US5627993
Methods and systems for merging
data during cache checking and write-back cycles for memory reads and writes
US5625793
Automatic cache bypass for
instructions exhibiting poor cache hit ratio
US5625787
Superscalar instruction
pipeline using alignment logic responsive to boundary identification logic for
aligning and appending variable length instructions to instructions stored in
cache
US5623632
System and method for
improving multilevel cache performance in a multiprocessing system
US5615168
Method and apparatus for
synchronized pipeline data access of a memory system
US5613086
Method and system for locking
a page of real storage using a virtual address
US5603011
Selective shadowing and paging
in computer memory systems
US5594876
Arbitration protocol for a
bidirectional bus for handling access requests to a logically divided memory in
a multiprocessor system
US5247647
Detection of deletion of
stored data by concurrently executing processes in a multiprocessing data
processing system
US5228136
Method and apparatus to
maintain cache coherency in a multiprocessor system with each processor's
private cache updating or invalidating its contents based upon set activity
US5220669
Linkage mechanism for program
isolation
Publication Title
US6253372
Determining a communication
schedule between processors
US6247091
Method and system for
communicating interrupts between nodes of a multinode computer system
US6230206
System for internode deadlock
avoidance in parallel database system using as overflow buffer a temporary table
storage allocated to the parallel database application program being executed
US6226695
Information handling system
including non-disruptive command and data movement between storage and one or
more auxiliary processors
US5682491
Selective processing and routing
of results among processors controlled by decoding instructions using mask
value derived from instruction tag and processor identifier
US5680402
Priority broadcast and
multi-cast for unbuffered multi-stage networks
US5659757
Method and system for lock
instrumentation in a data processing system
US5655103
System and method for handling
stale data in a multiprocessor system
US5652864
Concurrent storage allocations
or returns without need to lock free storage chain
US5649135
Parallel processing system and
method using surrogate instructions
US5274782
Method and apparatus for
dynamic detection and routing of non-uniform traffic in parallel buffered
multistage interconnection networks
US5247616
Computer system having
different communications facilities and data transfer processes between
different computers
US5204954
Remote storage management
mechanism and method
US5185861
Cache affinity scheduler
Publication Title
US6324631
Method and system for
detecting and coalescing free areas during garbage collection
US6305014
Lifetime-sensitive instruction
scheduling mechanism and method
US6301652
Instruction cache alignment
mechanism for branch targets based on predicted execution frequencies
US6292843
Quick loading of run time
dynamic link library for OS/2
US6292795
Indexed file system and a
method and a mechanism for accessing data records from such a system
US6275986
Compile-time data dependency
verification
US6266808
Computer program product for enabling
the construction of dialogs for commands and templates
US6263498
Method and apparatus for
enabling server side distributed object modification
US6260075
System and method for
providing shared global offset table for common shared library in a computer
system
US6249911
Optimizing compiler for
generating store instructions having memory hierarchy control bits
US6249906
Adaptive method and system to
minimize the effect of long table walks
US6249852
Method for heap management of
fixed sized objects using pages
US6223341
Computer-program compilers
comprising a program augmentation capability
US6223200
System and method for reducing
research time through a lock wait matrix
US6216143
Apparatus and method for
generating animated color coded software traces
US6199160
Computer system and method for
performing multiple tasks
US6195710
Operating system having shared
personality neutral resources
US6173444
Optimizing compilation of
pointer variables in the presence of indirect function calls
US5701486
Tracing technique for
application programs using protect mode addressing
US5692156
Computer program product for
overflow queue processing
US5687327
System and method for
allocating bus resources in a data processing system
US5684992
User console and computer
operating system asynchronous interaction interface
US5675795
Boot architecture for
microkernel-based systems
US5675767
Method for verification and restoration
of directories in CPU system managed store
US5671441
Method and apparatus for
automatic generation of I/O configuration descriptions
US5669001
Object code compatible
representation of very long instruction word programs
US5668958
Heterogeneous filing system
with common API and reconciled file management rules
US5664190
System and method for enabling
an event driven interface to a procedural program
US5664186
Computer file management and
backup system
US5659752
System and method for
improving branch prediction in compiled program code
US5655101
Accessing remote data objects
in a distributed memory environment using parallel address locations at each
local memory to reference a same data object
US5651139
Protected system partition
read/write access on a SCSI controlled DASD
US5642506
Method and apparatus for
initializing a multiprocessor system
US5640568
Inline expansion method for
programming languages having array functions
US5628023
Virtual storage computer
system having methods and apparatus for providing token-controlled access to
protected pages of memory via a token-accessible view
US5625832
Distributed processing control
method and distributed processing system
US5623618
Installation and use of plural
expanded memory managers
US5617568
System and method for
supporting file attributes on a distributed file system without native support
therefor
US5615354
Method and system for
controlling references to system storage by overriding values
US5613121
Method and system of
generating combined storage references
US5613118
Profile-based preprocessor for
optimizing programs
US5606696
Exception handling method and
apparatus for a microkernel data processing system
US5249291
Method and apparatus for
consensual delegation of software command operations in a data processing
system
US5247681
Dynamic link libraries system
and method
US5237668
Process using virtual
addressing in a non-privileged instruction to control the copying of a page of
data in or between multiple media
US5220653
Scheduling input/output
operations in multitasking systems
US5202995
Method for removing invariant
branches from instruction loops of a computer program
US5193190
Partitioning optimizations in
an optimizing compiler
US5179703
Dynamically adaptive
environment for computer programs
Publication Title
US6311198
Method and system for
threading documents
US6286025
Method and system of process
identification by user defined process variables
US6286000
Light weight document matcher
US6279002
System and procedure for
measuring the performance of applications by means of messages
US6271846
Method for reanchoring
branches within a directory tree
US6262725
Method for displaying holidays
in a locale-sensitive manner across distributed computer enterprise locales
US6260083
System for Java data block transfers
of unknown length for applets and applications by determining length of data in
local buffer and passing length of data combined with data out of program
US6259453
Meshing method and apparatus
US6226405
Method and apparatus for
updating node position
US6219066
Method and system for
graphical display of probability relationships
US6199043
Conversation management in speech
recognition interfaces
US6195736
Method for paging software
wavetable synthesis samples
US6195096
Graphical interface method,
apparatus and application for creating and modifying a multiple-value text list
US5701456
System and method for
interactively formulating database queries using graphical representations
US5699534
Multiple display pointers for computer
graphical user interfaces
US5696918
Method of managing marker
entities within a document data stream
US5692143
Method and system for
recalling desktop states in a data processing system
US5689723
Method for allowing single-byte
character set and double-byte character set fonts in a double-byte character
set code page
US5689668
Dynamic hierarchical selection
menu
US5686937
User interface system and
method for creating and removing a scrolling icon from a display based upon
user past and present interaction with the icon
US5682488
Variable computer icon for
single control of complex software functions executed on a data processing
system
US5680605
Method and apparatus for
searching a large volume of data with a pointerbased device in a data
processing system
US5680560
Method and device for
graphically setting multiple parameter ranges
US5678052
Methods and system for
converting a text-based grammar to a compressed syntax diagram
US5668966
System and method for direct
manipulation of search predicates using a graphical user interface
US5668959
Creating multiple versions of
panels from a single panel definition file
US5664210
Method and system of providing
multiple selections in text on a computer display
US5664097
System for delaying the activation
of inactivity security mechanisms by allowing an alternate input of a
multimedia data processing system
US5663517
Interactive system for
compositional morphing of music in real-time
US5659772
Method for customizing
kana-kanji conversion system and kana-kanji conversion system
US5652899
Software understanding aid for
generating and displaying simplified code flow paths with respect to target
code statements
US5649080
Apparatus and method for
converting line segment data to three-dimensional data
US5649060
Automatic indexing and aligning
of audio and text using speech recognition
US5646651
Block mode, multiple access
multi-media/graphics memory
US5644715
System for scheduling
multimedia sessions among a plurality of endpoint systems wherein endpoint
systems negotiate connection requests with modification parameters